The invention resides in a method of operating an electronic system by which the calculation accuracy in non-linear functions is increased.
Algorithms requiring a large number of calculations as they are used particularly in the image and signal processing field are performed generally by a computer or often, in technical applications, by microprocessors or digital signal processors. However, the calculation periods of these processors is often very long so that it often makes sense to install into the computer particular hardware which increases the processing speed of computation-intensive algorithms. This means that a specific chip (often a customer-specific chip—ASIC) or a set of chips is included in an electronic card, which may be used in a personal computer for increasing the processing speed. In comparison with conventional data processor solutions mainly the data formats are different.
A number format with a fixed point representation as compared to a floating point representation has the advantage that it provides for a simple and fast calculation.
For that reason, most customized chips (ASIC) use this type of representation. The greatest disadvantage herein however resides in a reduced accuracy in comparison with floating point operation. For internal computation, therefore often a greater word width is used for the number representation, which however cannot be maintained for external connections since then the expenses for data storage become excessive (see The IEEE standard for binary floating point arithmetic, ANSI/IEEE Standard 754—1985). This floating point format is very general and, with regard to size and number of building components, is far less efficient to accommodate.
Possible codings for different positions of the point are described in the publication of the Research Center Karlsruhe, Wissenschaftliche Berichte, FZKA 6251, 1/99, Fischer; “Optimierte Implementierung neuronaler Strukturen in Hardware”, pages 70-75; http:hik.www4.fzk.de/hbk/literatur/FZK-Berich-te/FZKA6251.1.pdf, “download” on 22.05.2000 XP002138370. As input word, a binary number in a fixed-point format with a plus or minus sign is converted in a suitable process into an output word, in which the position of the decimal point is coded in the word itself.
WO 95 02861 A1 discloses a data processing system with a limited look-up table for a function with non-uniform solution.
If a larger word width is used for the intermediate format than for the output format a conversion from the larger to the smaller format has to occur. This involves a loss of accuracy. To that end, generally so many bits of the longer word are cut-off until the content fits into the smaller word. If the high-value bits are shortened, provisions must be made for a corresponding overflow treatment; if the low value bits are excessively shortened, the accuracy suffers. If no consideration is given to the subsequent external processing of the data outside of the chip, there is generally no other method available for increasing the accuracy of the output data.
It is therefore the object of the invention to provide a method for operating an electronic system by which the computation accuracy of non-linear functions is increased and to provide an electronic system with which the method can be efficiently performed that is within an optimum of time.